Intel Preps New Performance Optimizations & Features For Linux 6.15 Graphics Driver

In addition to AMD beginning to queue graphics driver improvements for Linux 6.15, Intel open-source engineers are doing the same and this morning sent out their initial feature pull request to DRM-Next of the i915/Xe kernel graphics/display driver improvements they have been working on for the upcoming Linux 6.15 kernel.

There’s a lot in store with today’s Intel pull request of ongoing display/graphics driver work for Linux 6.15. Additional feature work is still expected to be submitted over the next week or two while out today is the big one with many changes ready for this next kernel version.

First up there is now support for DisplayPort Ultra-High Bit Rate (UHBR) Single-Stream Transport Display Stream Compression (DP UHBR SST DSC / DP 128b/132b SST DSC). This is important for upcoming Intel Panther Lake display capabilities with new high-end displays.

This Intel graphics code update also has improvements around its Display State Buffer (DSB) DMA engine for reducing CPU work. The Intel DSB can now perform commits when Variable Rate Refresh (VRR) is enabled as well as when using Panel Self Refresh (PSR) on Lunar Lake and newer.

Another notable change for the Intel graphics code in Linux 6.15 is enabling async page-flips with compressed buffers going back to Ice Lake graphics and newer.

Intel Arc graphics cards

The Intel driver also now supports luminance-based brightness control via DisplayPort Configuration Data (DPCD) for Embedded DisplayPort (eDP).

There are also enabling GuC SLPC default strategies for Meteor Lake graphics and newer to help with performance. The patch applying those GuC SLPC default strategies explains:

“The Balancer and DCC strategies were left off on a fear that these strategies would conflict with the i915’s waitboost.

However, on MTL and Beyond these strategies are only active in certain conditions where the system is TDP limited. So, they don’t conflict, but help the waitboost by guaranteeing a bit more of GT frequency.

Without these strategies we were likely leaving some performance behind on some scenarios.

With this change in place, the enabling/disabling of DCC and Balancer will now be chosen by GuC, on a platform/GT basis.”

Yet another change in this pull request worth mentioning is the Intel Xe kernel driver now supporting DisplayPort tunneling.

Features and functionality:
- Enable DP 128b/132b SST DSC
- Allow DSB to perform commits when VRR is enabled
- Compute HDMI PLLs for SNPS/C10 PHYs for rates not in fixed tables
- Allow DSB usage when PSR is enabled on LNL+
- Enable Panel Replay mode change without full modeset
- Enable async flips with compressed buffers on ICL+
- Support luminance based brightness control via DPCD for eDP
- Enable VRR enable/disable without full modeset
- Add debugfs facility for force testing HDCP 1.4
- Add scaler tracepoints, improve plane tracepoints
- Improve DMC wakelock debugging facilities
- Allow GuC SLPC default strategies on MTL+ for performance
- Provide more information on display faults

Refactoring and cleanups:
- Continue conversions to struct intel_display
- Joiner and Y plane reorganization
- Move HDCP debugfs to intel_hdcp.c
- Clean up and unify LSPCON interfaces
- Move code out of intel_display.c to reduce its size
- Clean up and simplify DDI port enabling/disabling
- Make LPT LP a dedicated PCH type, refactor
- Simplify DSC range BPG offset calculation
- Scaler cleanups
- Remove unused code from GVT
- Improve plane debugging
- DSB and VRR refactoring

Fixes:
- Check if vblank is sufficient for DSC prefill and scaler
- Fix Mesa clear color alignment regression
- Add missing TC DP PHY lane stagger delay
- Fix DSB + VRR usage for PTL+
- Improve robustness of display VT-d workarounds
- Fix platforms for dbuf tracker state service programming
- Fix DMC wakelock support conditions
- Amend DMC wakelock register ranges
- Disable the Common Primary Timing Generator (CMTG)
- Enable C20 PHY SSC
- Add workaround for DKL PHY DP mode write
- Fix build warnings on clamp() usage
- Fix error handling while adding a connector
- Avoid full modeset at probe on vblank delay mismatches
- Fix encoder HDMI check for HDCP line rekeying
- Fix HDCP repeater authentication during topology change
- Handle display PHY power state reset for power savings
- Fix typos all over the place
- Update HDMI TMDS C20 parameters for various platforms
- Guarantee a minimum hblank time for 128b/132b and 8b/10b MST
- Do not hardcode LSPCON settle timeout

Xe driver changes:
- Re-use display vmas when possible
- Remove double pageflip
- Enable DP tunneling
- Separate i915 and xe tracepoints

DRM core changes:
- Increase DPCD eDP display control CAP size to 5 bytes
- Add DPCD eDP version 1.5 definition
- Add timeout parameter to drm_lspcon_set_mode()

Great set of additions with new performance optimizations, a lot of display work, and more. See this pull request for the full list of Intel graphics driver changes submitted today to DRM-Next for Linux 6.15.